1. Field of the Invention
The invention relates generally to a direct memory access (DMA) mechanism in a computer system and, more particularly, to a non-fenced list DMA command mechanism.
2. Description of the Related Art
In a modern computer system, a direct memory access (DMA) mechanism may be used to handle data transfers between a system memory and a device (e.g., a memory mapped I/O, a hard disk or an I/O device) without interrupting a processor of the computer system with the details of the data transfer process. Typically, a direct memory access controller (DMAC) coupled to the processor receives one or more DMA commands from the processor. And the DMAC “unrolls” each DMA command into one or more transfer requests, which are then sent to a bus of the computer system. It is important to optimize the process of fetching DMA commands and unrolling the transfer requests for each DMA command in order to improve the system performance.
Therefore, there is a need for optimizing the process of handling such DMA commands in a computer system using a DMA mechanism.